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1CY 7C27 6
CY7C276
16K x 16 Reprogrammable PROM
Features
* 0.8-micron CMOS for optimum speed/power * High speed (for commercial and military)
Functional Description
The CY7C276 is a high-performance 16K-word by 16-bit CMOS PROM. It is available in a 44-pin PLCC/CLCC and a 44-pin LCC packages, and is 100% reprogrammable in windowed packages. The memory cells utilize proven EPROM floating gate technology and word-wide programming algorithms. The CY7C276 allows the user to independently program the polarity of each chip select (CS2-CS0). This provides on-chip decoding of up to eight banks of PROM. The polarity of the asynchronous output enable pin (OE) is also programmable. In order to read the CY7C276, all three chip selects must be active and OE must be asserted. The contents of the memory location addressed by the address lines (A13-A0) will become available on the output lines (D15-D 0). The data will remain on the outputs until the address changes or the outputs are disabled.
-- 25-ns access time
* 16-bit-wide words * Three programmable chip selects * Programmable output enable * 44-pin PLCC and 44-pin LCC packages * 100% reprogrammable in windowed packages * TTL-compatible I/O * Capable of withstanding greater than 2001V static dis-
charge
Logic Block Diagram
A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 D15 16K x 16 PROGRAMMABLE ARRAY D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 CS0 CS1 CS2 CS DECODE D2 D1 D0 OE
C276-1 D12 D11 D10 D9 D8 VSS VCC D7 D6 D5 D4
Pin Configuration
LCC/PLCC/CLCC Top View
7 8 9 10 11 12 13 14 15 16 17
6 5 4 3 2 1 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 18 19 20 21 22 23 24 25 26 27 28
A13 A12 A11 A10 A9 VSS VSS A8 A7 A6 A5
C276-2
Cypress Semiconductor Corporation
*
3901 North First Street
*
San Jose * CA 95134 * 408-943-2600 March 1991 - Revised December 1993
CY7C276
Selection Guide
CY7C276-25 Maximum Access Time (ns) Maximum Operating Current (mA) Commercial Military 25 175 200 CY7C276-30 30 175 200 CY7C276-35 35 175 200
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ................................. -65C to+150C Ambient Temperature with Power Applied............................................. -55C to+125C Supply Voltage to Ground Potential ................ -0.5V to+7.0V DC Voltage Applied to Outputs in High Z State ................................................ -0.5V to+7.0V DC Input Voltage............................................ -3.0V to +7.0V DC Program Voltage .....................................................13.0V UV Erasure ...................................................7258 Wsec/cm2
Static Discharge Voltage ........................................... >2001V (per MIL-STD-883, Method 3015) Latch-Up Current ..................................................... >200 mA
Operating Range
Range Commercial Industrial[1] Military[2] Ambient Temperature 0C to +70C -40C to +85C -55C to +125C VCC 5V 10% 5V 10% 5V 10%
Electrical Characteristics[3, 4]
CY7C276-25 CY7C276-30 CY7C276-35 Parameter VOH VOL VIH VIL IIX VCD IOZ IOS ICC Description Output HIGH Voltage Output LOW Voltage Input HIGH Level Input LOW Level Input Leakage Current Input Clamp Diode Voltage Output Leakage Current Output Short Circuit Current Power Supply Current VCC = Max., VOL < VOUT < VOH, Output Disabled VCC = Max., VOUT = 0.0V[5] VCC = Max., IOUT = 0.0 mA Com'l Military Test Conditions VCC = Min., IOH = -2.0 mA VCC = Min., IOL = 8.0 mA (6.0 mA Mil) Guaranteed Input Logical HIGH Voltage for All Inputs Guaranteed Input Logical LOW Voltage for All Inputs GND < VIN < VCC 2.0 -3.0 -10 Min. 2.4 0.4 VCC 0.8 +10 Max. Unit V V V V A A A mA mA mA
Note 3 -40 -20 +40 -90 175 200
Capacitance[3]
Parameter CIN COUT Description Input Capacitance Output Capacitance Test Conditions TA = 25C, f = 1 MHz, VCC = 5.0V Max. 10 10 Unit pF pF
Notes: 1. Contact a Cypress representative for industrial temperature range specifications. 2. TA is the "instant on" case temperature 3. See Introduction to CMOS PROMs in this Data Book for general information on testing. 4. See the last page of this specification for Group A subgroup testing information. 5. For test purposes, not more than one output at a time should be shorted. Short circuit test duration should not exceed 30 seconds.
2
CY7C276
AC Test Loads and Waveforms
R1 500 (658 MIL) R1 500 (658 MIL) R2 333 (403 MIL)
C276-3 C276-4
3.0V GND < 3 ns
ALL INPUT PULSES 90% 10% 90% 10% < 3 ns
5V OUTPUT 50 pF INCLUDING JIG AND SCOPE
5V OUTPUT R2 333 (403 MIL) 5 pF INCLUDING JIG AND SCOPE
(a) Normal Load
(b) High Z Load
Equivalent to: THEVENIN EQUIVALENT OUTPUT 200 (250MIL) 2.0V (1.9V Mil)
C276-5
Switching Characteristics Over the Operating Range[3,4]
CY7C276-25 Parameter tAA tCSOV tCSOZ tOEV tOEZ Description Address to Output Data Valid CS Active to Output Valid CS Inactive to High Z Output OE Active to Output Valid OE Inactive to High Z Output Min. Max. 25 13 13 11 11 CY7C276-30 Min. Max. 30 15 15 12 12 CY7C276-35 Min. Max. 35 18 18 15 15 Unit ns ns ns ns ns
Erasure Characteristics
The recommended dose of ultraviolet light for erasure is a wavelength of 2537 Angstroms for a minimum dose (UV intensity multiplied by exposure time) of 25 Wsec/cm2. For an ultraviolet lamp with a 12 mW/cm2 power rating the exposure time would be approximately 35 minutes. The 7C276 needs to be within 1 inch of the lamp during erasure. Permanent dam-
age may result if the EPROM is exposed to high-intensity UV light for an extended period of time. 7258 Wsec/cm2 is the recommended maximum dosage. Wavelengths of light less than 4000 Angstroms begin to erase the 7C276 in the windowed package. For this reason, an opaque label should be placed over the window if the EPROM is exposed to sunlight or fluorescent lighting for extended periods of time.
3
CY7C276
Switching Waveforms
Read Operation Timing Diagram [6]
A13 - A0 tAA D15 - D0
ADDR A
ADDR B tAA
DATA A
DATA B
C276-6
Chip Select and Output Enable Timing Diagrams
A13 - A0
CS2 - CS0 OE ACTIVE HIGH
INACTIVE
ACTIVE
INACTIVE
tCSOV D15 - D0 VALID
tOEZ
tOEV
tCSOZ VALID
HIGH Z
C276-7
Notes: 6. CS2 - CS0, OE assumed active.
Architecture Configuration Bits
The CY7C276 has four user-programmable options in addition to the reprogrammable data array. For detailed programming information contact your local Cypress representative. The programmable options determine the active polarity for the three chip selects (CS2 - CS0) and OE. When these control bits are programmed with a 0 the inputs are active LOW. When these control bits are programmed with a 1 the inputs are active HIGH.
Programming Information
Programming support is available from Cypress as well as from a number of third-party software vendors. For detailed programming information, including a listing of software packages, please see the PROM Programming Information located at the end of this section. Programming algorithms can be obtained from any Cypress representative.
4
CY7C276
Table 1. Control Word for Architecture Configuration Control Word Control Option OE CS0 CS1 CS2 Bit D0 D12 D13 D14 Programmed Level 0=Default 1=Programmed 0=Default 1=Programmed 0=Default 1=Programmed 0=Default 1=Programmed Function OE Active LOW OE Active HIGH CS0 Active LOW CS0 Active HIGH CS1 Active LOW CS1 Active HIGH CS2 Active LOW CS2 Active HIGH
Bit Map
Programmer Address (Hex) 0000 . . . 3FFF 4000 Data . . . Data Control Word RAM Data
Control Word (4000H) D15 D0 X CS2 CS1 CS0 X X X X X X X X 1 X X OE Table 2. Program Mode Table Mode Program Inhibit Program Enable Program Verify VPP VPP VPP VPP PGM VIHP VILP VIHP VFY VIHP VIHP VILP D0 - D15 High Z Data Data
Table 3. Configuration Mode Table Mode Program Inhibit Program Control Word Verify Control Word VPP VPP VPP VPP PGM VIHP VILP VIHP VFY VIHP VIHP VILP A2 VPP VPP VPP D0 - D15 High Z Control Word Control Word
D12 D11 D10 D9 D8 VSS VCC D7 D6 D5 D4
7 8 9 10 11 12 13 14 15 16 17
6 5 4 3 2 1 44 43 42 41 40 39 38 37 CY7C276 36 35 34 33 32 31 30 29 18 19 20 21 22 23 24 25 26 27 28
A13 A12 A11 A10 A9 VSS VSS A8 A7 A6 A5
C276-8
Figure 1. Programming Pinout
5
CY7C276
Typical DC and AC Characteristics
NORMALIZED I CC vs. tCKA CYCLE 1.2 1.1 1.0 0.9 1.0 0.8 0.7 0.6 0.5 0.6 0 100 200 300 400 500 ACCESS TIME (ns) NORMALIZED t CKA vs. SUPPLY VOLTAGE 1.2 25 20 15 1.0 10 0.9 TA =90C 0.9 4.0 4.5 5.0 5.5 6.0 5 0 0.95 0.90 0 200 400 600 800 1000 0.85 -55 25 125 TA =25C VCC=4.5V 4 4.5 5 5.5 OUTPUT VOLTAGE (V) 6 0.6 -55 25 125 0.8 0.8 1.0 TA =25C VCC=5.5V 1.2 1.4 TA =25C f=f MAX NORMALIZED ICC vs. OUTPUT VOLTAGE 1.4 VCC=4.5V 1.2 NORMALIZED t CKA vs. TEMPERATURE
AMBIENT TEMPERATURE (C) NORMALIZED I CC vs. AMBIENT TEMPERATURE 1.1 1.05 1.0 VCC=5.6V
tCKA CHANGE vs. OUTPUT LOADING
1.1
SUPPLYVOLTAGE(V) NORMALIZED t OEV vs. TEMPERATURE 1.2
OUTPUT LOAD (pF)
AMBIENT TEMPERATURE (C) tOEV CHANGE vs. OUTPUT LOADING 35 30
1.1
25 20
1.0 VCC =4.5V 0.9 0 -55
15 10 5 0 25 TEMPERATURE(C) 125 0 200 400 600 800 1000
C276-9
VCC =4.5V TA =25C
OUTPUT LOAD (pF)
6
CY7C276
Ordering Information[7]
Speed (ns) 25 Package Name H67 J67 H67 Q67 H67 J67 H67 Q67 H67 J67 H67 Q67 Operating Range Commercial
Ordering Code CY7C276-25HC CY7C276-25JC CY7C276-25HMB CY7C276-25QMB
Package Type 44-Pin Windowed Leaded Chip Carrier 44-Lead Plastic Leaded Chip Carrier 44-Pin Windowed Leaded Chip Carrier 44-Pin Windowed Leadless Chip Carrier 44-Pin Windowed Leaded Chip Carrier 44-Lead Plastic Leaded Chip Carrier 44-Pin Windowed Leaded Chip Carrier 44-Pin Windowed Leadless Chip Carrier 44-Pin Windowed Leaded Chip Carrier 44-Lead Plastic Leaded Chip Carrier 44-Pin Windowed Leaded Chip Carrier 44-Pin Windowed Leadless Chip Carrier
Military
30
CY7C276-30HC CY7C276-30JC CY7C276-30HMB CY7C276-30QMB
Commercial
Military
35
CY7C276-35HC CY7C276-35JC CY7C276-35HMB CY7C276-35QMB
Commercial
Military
Notes: 7. Most of the above products are available in industrial temperature range. Contact a Cypress representative for specifications and product availability.
MILITARY SPECIFICATIONS Group A Subgroup Testing DC Characteristics
Parameter VOH VOL VIH VIL IIX IOZ ICC Subgroups 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3
Switching Characteristics
Parameter tAA tCSOV tOEV Subgroups 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11
Document #: 38-00183-D
7
CY7C276
Package Diagrams
44-Pin Windowed Leaded Chip Carrier H67
8
CY7C276
Package Diagrams (continued)
44-Lead Plastic Leaded Chip Carrier J67 44-Square Leadless Chip Carrier L67
MIL-STD-1835 C-5
44-Pin Windowed Leadless Chip Carrier Q67
MIL-STD-1835 C-5
(c) Cypress Semiconductor Corporation, 1993. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.

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